The 7305 extra TMU is similar to the legacy customized system timer's extra TMU (A44C0030)
| Address | Size (bit) | Int pri register | System timer | 7730 IPR |
| A44D0030 | 8 | IPRJ h'0FFF | 5..10; bit0:startflag | - |
| A44D0034 | 32 | constant | ||
| A44D0038 | 32 | count | ||
| A44D003C | 8 | bit1:underflowflag;bit0:enableintflag | ||
| A44D0050 | 8 | IPRG h'F0FF | 1 | SCIF1 |
| A44D0054 | 32 | |||
| A44D0058 | 32 | |||
| A44D005C | 8 | |||
| A44D0070 | 8 | IPRG h'FF0F | 2 | SCIF2 |
| A44D0074 | 32 | |||
| A44D0078 | 32 | |||
| A44D007C | 8 | |||
| A44D0090 | 8 | IPRE h'FF0F | 3 | - |
| A44D0094 | 32 | |||
| A44D0098 | 32 | |||
| A44D009C | 8 | |||
| A44D00B0 | 8 | IPRI h'0FFF | 4 | SIOF |
| A44D00B4 | 32 | |||
| A44D00B8 | 32 | |||
| A44D00BC | 8 | |||
| A44D00D0 | 8 | helping timeout timer | ||
| A44D00D4 | 32 | constant | ||
| A44D00D8 | 32 | count | ||
| A44D00DC | 8 | |||
The timer table starts at 0x88090014. The table consists of 10 timer entries each 16 byte long.
Timer 4 serves the USB communication and uses syscall 0x1ECF as handler (Range of InternalTimerID: 1..10).
For the interfaces of syscalls 0x08D9..0x08DC refer to
the legacy syscalls 0x0118..0x11B.
Differences:
Installing (syscall 0x08D9) a timer with
InternalTimerID ==
0 tries to find a free user timer slot starting at timer 5!
The system timers 1..4 must be installed explicitly.
If one the timers is running, register A44D00D8 could be used a fine resolution timing device. It counts about 50000 times per second, t. i. 20µS per tick.
Hint! Timer handlers must not contain any direct display writing function! The fxCG-direct display functions are not reentrant. The user timer slots (5..10) are deinstalled, when switching from one application to another. A system timer handler must be positioned in an application-switch-secure area, f. i. some RAM. IL-memory would possibly be a good choice. Of course the binary loaded must be linked which appropriate relocation addresses.
(19.06.2011 08:50:36)