SuperH-based fx calculators
fx-CG20, Display Driver, LCD controller

Because of the lack of available documentation, this chapter remains a construction site.

The renesas R61509 register pattern is a subset of the Prizm LCD controller's register set. On receiving a "Device code read (R000h)", the controller identifies itself as renesas R61524, a manual of which could not be found yet. Moreover the term "renesas R61524" not even gives any response on the web. I fear this one is customized again. Luckily the manual of the renesas R61509 is available and covers most aspects of the Prizm LCD controller. Though the R61509 has no backlight support. Hence some registers (f. i. h'5A1 or h'5A2) are not covered in the R61509 documentation. The renesas R61517 is a type with backlight control and would fit better. The are a lot of responses on the web, when "renesas R61517" is queried. But I could not find a manual yet.

On the renesas R61524 "horizontal" and "vertical" seems to be switched (compared to the R61509).

The R61505W and the R61580 (both 2009) are intermediate developments, the register addresses are similar to the R61509 (and R61524). The register address range has been reduced to 0..0xFF. To a certain degree it is possible to map these register addresses to the old type ones.
The R61526 and the R61581 (both 2010) are new developments, the register addresses do not fit the one's of the old types (R61509, R61524). It seems to be difficult -if not impossible- to map the register addresses to the old type ones.

The host interface is the address 0xB4000000, similar to the legacy systems.

LCD-DMA-hook example

Backlight

Differences between R61509 and R61524.
ubp: used bits pattern
iw: initialized with

Display control

Index R61509 Prizm LCD controller Register description (R61509) compatibility
h'000 returns h'1509 on read returns h'1524 on read Device code read 100
h'001 ubp: 0000 0101 0000 0000 iw: 0000 0101 0000 0000 Driver Output Control 100
h'002 ubp: 0000 0001 0000 0011 iw: 0000 0001 0000 0000 LCD Driving Wave Control 100
h'003 ubp: 1101 0010 1011 1011 iw: 0000 0000 1010 0000 Entry mode 100
h'004 - -    
h'005 - iw: 0000 0000 0000 0000   0
h'006 ubp: 1000 0011 1111 1111 not used Outline Sharpening Control  
h'007 ubp: 0011 0001 0111 0011 not used Diplay control 1  
h'008 ubp: 0000 1111 0000 1111 iw: 0000 1000 0000 1000 Diplay control 2 100
h'009 ubp: 0000 1111 0011 1111 not used Diplay control 3  
h'00B ubp: 0000 0000 0001 0001 iw: 0000 0000 0000 0000 Low Power Control 100
h'00C ubp: 0111 0001 0011 0011 not used External Display Interface Control 1  
h'00D - iw: 1000 0000 0000 0000   0
h'00F ubp: 0000 0000 0001 1011 not used External Display Interface Control 2  
h'010 ubp: 0000 0011 0001 1111
allowed range: h'10..h'1F
iw: 0000 0000 0011 0110
allowed range: h'10..h'3F
Panel Interface Control 1 90
h'011 ubp: 0000 0111 0000 0111 not used Panel Interface Control 2  
h'012 ubp: 0000 0011 0000 0000 not used Panel Interface Control 3  
h'020 ubp: 0000 0011 0111 1111 not used Panel Interface Control 4  
h'021 ubp: 0000 1111 0000 1111 iw: 0000 0001 0001 0011 Panel Interface Control 5 90
h'022 ubp: 0000 0111 0000 0000 iw: 0000 0001 0000 0001 Panel Interface Control 6 70
h'023 - iw: 0000 0000 0000 0001   0
h'090 ubp: 1111 0001 1111 1111 not used Frame Marker Control  
h'092 ubp: 0000 0000 0000 0011 not used MDDI Sub-display Control  

Power control

Index R61509 Prizm LCD controller Register description (R61509) compatibility
h'100 ubp: 0111 0111 1111 0110 iw: 0000 0000 0011 0000 Power control 1 100
h'101 ubp: 0000 0111 0111 0111 iw: 0010 0010 0011 0001 Power control 2 89
h'102 ubp: 0000 0001 1011 1111 iw: 0000 0001 1000 1111 Power control 3 100
h'103 ubp: 0011 1111 0000 0000 not used Power control 4  
h'104 - iw: 0000 0000 1110 1001   0
h'105 - iw: 0000 0000 0111 0001   0
h'107 ubp: 0000 0000 0011 1111 not used Power control 5  
h'108 - iw: 0000 0000 0000 0000   0
h'110 ubp: 0000 0000 0000 0001 not used Power control 6  
h'111 - 0x0192: 0000 0000 0000 0010   0
h'112 ubp: 0000 0011 0110 0000 not used Power control 7  

RAM access

Index R61509 Prizm LCD controller Register description (R61509) compatibility
h'200 ubp: 0000 0000 1111 1111 ubp: 0000 0001 1111 1111
iw: 0000 0000 0000 0000
RAM Address Set (Horizontal Address) 90
h'201 ubp: 0000 0001 1111 1111 ubp: 0000 0000 1111 1111
iw: 0000 0000 0000 0000
RAM Address Set (Vertical Address) 90
h'202     Write/Read Data from GRAM 100
h'280   not used Write/Read Data from/to NVM  
h'281   not used VCOM High Voltage 1  
h'282   not used VCOM High Voltage 2  

Windows address control

Index R61509 Prizm LCD controller Register description (R61509) compatibility
h'210 ubp: 0000 0000 1111 1111 ubp: 0000 0001 1111 1111
iw: 0000 0000 0000 0000
Window Horizontal RAM Address Start 90
h'211 ubp: 0000 0000 1111 1111 ubp: 0000 0001 1111 1111
iw: 0000 0001 1000 1011 (395)
Window Horizontal RAM Address End 90
h'212 ubp: 0000 0001 1111 1111 ubp: 0000 0000 1111 1111
iw: 0000 0000 0000 0000
Window Vertical RAM Address Start 90
h'213 ubp: 0000 0001 1111 1111 ubp: 0000 0000 1111 1111
iw: 0000 0000 1101 1111 (223)
Window Vertical RAM Address End 90

Due to the fact, that the Prizm display is of the landscape-type, registers concerning horizontal and vertical coordinates have  exchanged the allowed ranges.

γ-control

Index R61509 [R61580] Prizm LCD controller Register description (R61509) compatibility
h'300 ubp: 0000 0111 0000 0111 [h'30:0001 1111 0001 1111] iw: 0001 0000 0000 1010 γ-control 1 0 [100]
h'301 ubp: 0000 0111 0000 0111 [h'31:1111 1111 0001 1111] iw: 1001 1010 0000 1010 γ-control 2 0 [100]
h'302 ubp: 0000 0111 0000 0111 [h'32:0001 1111 0000 1111] iw: 0000 0000 0100 0011 γ-control 3 0 [90]
h'303 ubp: 0000 0011 0000 0011 [h'33:0001 1111 0001 1111] iw: 0001 0001 0000 1100 γ-control 4 0 [100]
h'304 ubp: 0000 0011 0000 0011 [h'34:0011 0011 0011 0011] iw: 0000 0000 0000 0000 γ-control 5 0 [100]
h'305 ubp: 0000 0111 0000 0111 [h'35:0001 1111 0001 1111] iw: 0000 1100 0000 1010 γ-control 6 0 [90]
h'306 ubp: 0001 1111 0001 1111 [h'36:1111 1111 0001 1111] iw: 1001 0101 0000 0111 γ-control 7 0 [100]
h'307 ubp: 0000 0111 0000 0111 [h'37:0001 1111 0000 1111] iw: 0000 1011 0000 1100 γ-control 8 0 [100]
h'308 ubp: 0000 0111 0000 0111 [h'38:0001 1111 0001 1111] iw: 0000 0111 0000 1111 γ-control 9 0 [100]
h'309 ubp: 0000 0111 0000 0111 [h'39:0011 0011 0011 0011] iw: 0000 0000 0000 0000 γ-control 10 0 [100]
h'30A ubp: 0000 0011 0000 0011   γ-control 11  
h'30B ubp: 0000 0011 0000 0011   γ-control 12  
h'30C ubp: 0000 0111 0000 0111   γ-control 13  
h'30D ubp: 0001 1111 0001 1111   γ-control 14  

Backlight control

The main backlight level can be set by bit 4 of port 0xA4050138. The sub backlight level can be set by LCD port 0x5A1. That gives a backlight level range of 0..511.

Reading a point's color (syscall 0x026F( int x, int y )):
sys01a6_Bdisp_WriteDDRegister3_bit7(0);
sys01a3_DD_SetCoords( x+6, 0, y, 0 );
sys01a2_DD_RegisterSelect( 0x202 );
result = *(short*)0xB4000000.

Writing a point's color (syscall 0x026B( int x, int y, short color )):
sys01a6_Bdisp_WriteDDRegister3_bit7(1);
sys01a3_DD_SetCoords( x+6, x+6, y, y );
sys01a2_DD_RegisterSelect( 0x202 );
*(short*)0xB4000000 = color.

Selecting a register (or command) (syscall 0x01A2(int))

The LCD register(command)numbers are of the type short. The data they point to is of the type short, too.

Usually it makes no sense to access the LCD controller registers(commands) directly. Use the syscalls instead.

LCD controller-register(command)numbers:
0x0010: frame frequency (allowed range: 0x11..0x3F)
0x0100: used in syscall 0x0192
0x0111: used in syscall 0x0192
0x0200: x-read, used when setting the coordinates to read a pixel.
0x0201: y-read, used when setting the coordinates to read a pixel.
0x0210,
0x0211,
0x0212,
0x0213,
0x0214,
0x0215: used when setting the coordinates to write a pixel.
0x0403: BC (cycle)
0x05A1: fine light level
0x05A2: PWM DIV

first initialization sequence in syscall 0x01a0

h'606 = 0
h'400 = h'B16F (1011 0001 0110 1111)
8 = h'808 (0000 1000 0000 1000)
h'100 = h'30
h'101 = h'2231 (0010 0010 0011 0001)
h'102 = h'18F (0000 0001 1000 1111 )
h'104 = h'E9
h'105 = h'71
h'108 = 0
1 = h'500 (0000 0101 0000 0000)
2 = h'100
3 = h'A0 (0000 0000 1010 0000)
5 = 0
h'B = 0
h'D = h'8000
h'10 = h'36
h'21 = h'113
h'22 = h'101
h'23 = 1
h'210 = 0
h'211 = h'18B (395)
h'212 = 0
h'213 = h'DF (223)
h'401 = 1
h'402 = 0
h'403 = 0
h'200 = 0
h'201 = 0

second initialization sequence in syscall 0x01a0

h'300 = h'100A (0001 0000 0000 1010)
h'301 = h'9A0A
h'302 = h'403
h'303 = h'110C
h'304 = 0
h'305 = h'C0A
h'306 = h'9507
h'307 = h'B0C
h'308 = h'70F
h'309 = 0
h'310 = h'100A
h'311 = h'9A0A
h'312 = h'403
h'313 = h'110C
h'314 = 0
h'315 = h'C0A
h'316 = h'9507
h'317 = h'B0C
h'318 = h'70F
h'319 = 0
h'320 = h'100A
h'321 = h'9A0A
h'322 = h'403
h'323 = h'110C
h'324 = 0
h'325 = h'C0A
h'326 = h'9507
h'327 = h'B0C
h'328 = h'70F
h'329 = 0
h'580 = 0
h'5A0 = 3
h'5A1 = h'D2
h'5A2 = h'3F
h'5A3 = 8

 

It seems to be not too simple to write to the Prizm's LCD-driver-interface 0xB4000000.

First the LCD-driver-register has to be selected.

If the OS issues a LCD-driver-register-select (syscall 0x01a2), it first clears bit 4 of SH-7724 port R 0xA405013C (it looks as if this bit controls the LCD-driver's RS-bit; refer to the R61509-manual).
Then the SH-4A instruction SYNCO is performed.
Then the register number is written to 0xB4000000
Then the SH-4A instruction SYNCO is performed.
Then bit 4 of SH-7724 port R 0xA405013C is set again.
Then the SH-4A instruction SYNCO is performed.

After a LCD-driver-register has been selected, it can be written to (by writing to 0xB4000000 again)

Every time register 0xB4000000 as well as SH-7724 port R 0xA405013C are written to, the SH-4A-specific instruction SYNCO is immediately performed.

It is doubtful that directly writing to the LCD-driver enhances display-performance.
I observed, that writing to VRAM and moving the RAM to the LCD by DMA (syscall 0x025F/syscall 0x0260) is significantly faster than direct LCD-driver access.


 

(14.10.2012 06:17:51)